Cathode ray tube deflection system

ABSTRACT

A cathode ray tube deflection system which consists of a series of weighted current steps utilizing switches to drive a deflection coil directionally sweeping over a screen. A transistor isolates the deflection coil from the switches. When a switch activates or closes, the transistor saturates and the current through the deflection coil rises linearly. The current through the deflection coil is limited to that determined by the current summation through resistor circuits connected to the switches or input terminals. The amount of current passage through the deflector coil determines the amount of movement over the screen.

Jan. 30, 1973 United States Patent [191 Cole SYSTEM inventor:

[54] CATHODE RAY TUBE DEFLECTION [76] Byron M. Cole, 555 Pine Tree Road, Jenkintown, Pa.

Oct. 15, 1970 Appl. No.: 81,077

ABSTRACT [22] F'led: A cathode ray tube deflection system which consists of a series of weighted current steps utilizing switches to drive a deflection coil directionally sweeping over a screen. A transistor isolates the deflection coil from the switches. When a switch activates or closes, the transistor saturates and the current through the deflection coil rises linearly The current through the deflection coil is limited to that determined by the current summation through resistor circuits connected to the switches or input terminals.

References Cited UNITED STATES PATENTS The amount of current passage through the deflector coil determines the amount of movement over the screen.

8/1970 LeFerre et [/1970 4/1968 Bryden............. Duerr et 8 Claims, 1 Drawing Figure HORIZONTAL DEFLECTION COIL BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to the field of electron deflection systems. In particular, this invention pertains to cathode ray tube deflection systems. More in particular this invention relates to the field of writing characters on a cathode ray tube by positioning the electron beam to form the characters directly, known in the art as spot positioning. Further, this invention relates to the field of describing pictures on a cathode ray tube when used in conjunction with a computer having stored memory means.

2. Prior Art Cathode ray tube deflection systems are known in the art. In writing alpha numeric characters on a cathode ray tube prior art has shown both T.V. scanning and spot positioning. In T.V. scanning a raster is laid down on the screen consisting of a series of horizontal lines. The raster is subsequently intensified at predetermined points to illuminate characters. This prior art requires electronic memory means to identify. which points are to be intensified on each of the scan sweeps. Relative inefficiencies arise by the use of such devices since the sweep covers the entire tube whereas intensified portions only cover a portion of the screen face.

In the prior art of spot positioning the character location bits of information are fed to a digital to analog converter and then to a feedback type horizontal amplifier which drives the deflection coils. In addition, separate digital to analog converters are used for horizontal and vertical positioning. Similarly, for individual characters separate digital to analog converters are used and fed to a divider in an amplifier.

Prior art has not revealed a system for cathode ray tube deflection systems where the digital bit information is transmitted directly to a digital to current converter which may be operated by a simple, yet highly reliable circuit utilizing a set of switch actuated resistance circuits to provide a predetermined current which drives a deflection coil directly.

SUMMARY OF THE INVENTION A cathode ray tube deflection system which includes a multiple of input terminals through which signal voltages are applied to the system to activate a plurality of resistance circuits which sum current levels to a predetermined value. The resistance circuits are connected to an input terminal of an isolating transistor which is in series connection with a deflection coil responsive to the predetermined output current from the resistance circuits.

An object of the present invention is to provide a circuit design and system to deflect an.electron beam in a predetermined manner on a cathode ray tube.

Another object of the invention is to provide a system of writing characters on a screen by directly forming the characters without the use of horizontal rasters and memory to determine which points are to be illuminated.

A further object of this invention is to develop a circuit where the digital bit information is transmitted directly to a digital to current converter.

A still further object of this invention is to establish an inexpensive, yet highly reliable circuit utilizing weighted current steps to drive a deflection coil.

BRIEF DESCRIPTION OF THE DRAWING The drawing schematically illustrates the circuit diagram for a cathode ray tube deflection system embodying'the invention.

DESCRIPTION OF THE PREFERRED EMBODIMENT Referring now to the schematic circuit diagram, there is shown a cathode ray tube deflection system comprising a plurality of input terminals 26 and 27 through which signal voltages are applied, a plurality of switching circuits encompassed by rectangle 60, a plurality of resistance circuits 40, an isolation transistor 9 i and a deflection coil 5 in series connection with transistor 9 and'a supply voltage source input at junction 1. It will be understood that for'clarity of'purpose and for the sake of reducing redundancy only two input terminals 26 and 27 with associated switching circuitry 60 and resistance circuits 40 are shown, however, as will be described in the following paragraphs s'uch representation may include a plurality of circuits eaCh havinga separate and distinct input terminal.

In one application a one megahertz clock is used to control positioning of an electron beam on the cathode ray tube. The clock drives a divide by 10 counter which is used to step a character vertically to each of seven positions and allow approximately 3 microseconds to return to zero. As is shown in the diagram the counter outputs or input terminals 26, 27 corresponding to the aforementioned seven spot positions are connected in series to the plurality of switching circuits 60. The output of this counter drives a divide by 5 counter which provides a horizontal positioning to produce a 5 by 7 dot raster and is applied to a set of horizontal switches. The output of this counter is transferred to a divide by 32 counter to position 32 characters across a screen horizontally. The circuit analysis and operation will be described in detail in the following paragraphs taken in conjunction with the accompanying drawing.

The basic concept of the invention is the use of a se ries of weighted current steps to drive deflection coil 5 directly. The weighted current steps are determined by a plurality of resistance circuits 12, 13 shown within rectangle 40, and connected in series to input terminals 26, 27. Each of the plurality of resistance circuits 12, 13 includes a separate resistance circuit containing a different and distinct number of resistors in parallel connection from each of the other circuits within the circuitry designated by enclosure 40. The number of resistors making up each of the parallel circuit connections is determined in accordance with'consecutive ascending binary digit progression. Further, each of the resistors in all the circuits l2, 13 are of one value.

Therefore, resistance circuit 12, connected to input R, and R Two resistors in parallel connection When both resistors are equal in value to R,, it is evident through algebraic manipulation that the equivalent resistance of the second network is R,/2. In similar fashion, the N" network 13 has an equivalent resistance of:

) REN= 1 1 1 1 E1 E F3"" R" where:

R Equivalent resistance value of N" circuit R,, R R, N resistors in parallel connection which reduces to an equivalent resistance ofR,/N when all the resistors in parallel connection are equal to R,. Therefore, each of networks 12, 13 has a separate and distinct equivalent resistance associated with it decreasing from a value of R, for the circuit 12 to a value of R,/N for circuit 13 in a constant linearly decreasing progression. Since the voltage drop across each of the circuits 12, 13 are constant, it is seen:

1,,= I, N (4) The current flow through each of the circuits 12, 13increases in linear progression from a value of I, for circuit 12 to I, N for circuit 13. The importance of the concept of achieving circuitry 40 which produces weighted current steps in linear progression is seen from the fact that the current through inductor or deflection coil 5 rises linearly for a fixed voltage differential in accordance with the well known equation:

AV= L dI/dt 5 In operation, input terminal or junction 26 receives either one of two signals, a value of zero or a nominal value of 5 volts. In practice, the input voltage at junction 26 may be somewhat less than the nominal voltage, however, such is not important to the inventive concept described herein. When the nominal voltage is applied at junction 26 transistor 31 within switching circuit rectangle 60 is turned on and a current I, flows through the circuit of resistor 12 and through the emit junction of transistor 9. in reciprocal manner, when a zero voltage exists at junction 26, transistor 31 is turned to an off position with no current passing through the portion of the circuit described by resistor circuit 12.

In similar fashion, when a nominal voltage level of 5 is input at junction 27 the current value passing through resistor 13 within rectangle 40 takes the value of NI,. If the voltage is impressed at both junctions 26 and 27 then the total current passing through emitter 9 is the sum of currents l, and NI,. Resistor circuits 12 and 13 are made up of standard 2 watt resistors in parallel connection and may be of the carbon type,

although such limitations are not important to the invention. In the manner described, a single resistor 12 is used for the R, value, two resistors in parallel for a 2 value, four resistors in parallel for a 4 value, increasing to N resistors in parallel for resistor circuit 13 where the value for N is at all times a binary integer. As is evident from the drawing at junction 11, where a number of circuits are utilized within rectangle 40, the current passing through emitter 9 is a multiple of I, and the binary number N selected, therefore the current through emitter transistor 9 is the sum of I, 21, 41, NI, dependent upon whether the junction input voltage signals at 26, 27 as well as intermediary junctions are zero or the nominal 5 volt input.

Block 50 shown in the drawing, encloses a series of capacitor-resistor circuits associated with each of the input junctions 26, 27 and all intermediaries to provide a standardized load for the logic block which drives junctions 26 and 27. Resistors 25 and 20 are chosen in order that the current on junctions 26 and 27 are limited to approximately 1 mil when associated transistors 31 and 18 within block 60 are turned on. Capacitors 24 and 21 are mounted in parallel connection to resistors 25 and 20 respectively since a capacitance exists on transistors 31 and 18 initially when no load is applied and in order to differentiate the start-up current flow, a distinct initial leading edge of current is needed. In practice the capacitor-resistor circuits 24, 25 and 20, 21 are needed dependent upon the particular circuit wiring ofa unit.

Current flow into transistor 18 within block 60 is N times that of transistor 31 as previously described which may be sufficient to cause an overload. In order to remain responsive to the increased current flow, transistor 17 is incorporated into the block circuit to form a pair or amplifier between transistors 17 and 18. When the voltage signal input to junction 27 decays to zero, the base charge on transistor 17 would be such as to cause a time delay before element 17 would be turned off. To alleviate this problem capacitor 28 and resistor 30 connected to ground 15 is input into the circuit as shown. When the input signal at junction 27 goes from a nominal voltage level of 5 to zero, a negative voltage passes through resistor 23 to transistor 22 at its base. The negative voltage forces the emitter diode to conduct and transistor 22 then acts as a shunt across transistor 17 to pull it to a negative potential within a short time delay period.

ln the manner described, by inputting zero or 5 volts at junctions 26 and 27, transistor 9 has imposed on it abrupt transitions of current at its basic junction, and deflection coil 5 essentially has a current ramp passing through it when the signal voltage is applied at junction 26. Junction 11 is pulled to ground conditions at this point thus turning transistor 9 to an on position. The voltage from emitter to collector becomes essentially zero and when transistor 9 is saturated, the voltage level at junction or point 8 becomes +24 volts less the base emitter diode drop. The voltage across deflection coil 5 is then 39 volts input at junction 1 achieved from power supply, minus transistor 9 voltage of +24 or a result of IS volts. Current through the yoke rises until the current reaches that determined by appropriate resistor circuits l2, l3 and transistor 9 stabilizes. Therefore, once voltage is applied to junction 26, a rise in current through deflection coil 5 is actuated up to the point determined by activated resistor circuits 12, 13 in a linear manner.

As described, voltage across coil 5 is rapidly switched from one value to another. By actuating different values of resistors 12, 13 a limiting current is imposed and horizontal deflection coil 5 moves rapidly to the predetermined current determined by the resistor selection made.

Zener diode 7 is introduced into the circuit as shown in order to prevent overload in transistor 9. Diode 7 dissipates energy during the fly-back period after the voltage signal at junctions 26 or 27 are dropped to zero. When the voltage is turned off, transistor 9 is deactivated. At this point the voltage at junction 10 will swing to a positive voltage. Transistor 9 has a maximum voltage rating associated with it and Zener diode 7 is turned on before this voltage level is met. In this manner excess energy which may damage transistor 9 is dissipated.

In the system described, when a nominal voltage is applied to junctions 26 or 27, the current passing through the deflection yoke is always in the same direction. Where this system is utilized in a cathode ray tube the movement would be initiated at the center of the screen and move in a horizontal direction. However, for display purposes, it may be desired to begin at the top left of a screen which may be accomplished by inputting a DC current in deflection coil 5 in order to move it to the left. This is accomplished through the elements shown in block 70 by adding regulator 2, battery 4 and RF coil 6 to the basic circuit as shown. Regulator 2 adjusts the current in order that the spot display is situated on the left front of the screen in order that any deflection is made to the right. Element 6, in series connection with regulator 2 and battery 4 acts as an isolator for the system and may be a transistor or RF coil as shown.

In the system as described, digital bit information goes directly to a digital to current converter. The basic concept is formed on the known fact that current through an inductor rises linearly for a flxed voltage placed across the inductor which is achieved by a series of weighted current steps to drive deflection coil 5 directly.

What is claimed is:

l. A cathode ray tube deflection system automatically operable as a function of signal voltages applied, comprising:

a. a plurality of input terminals through which said signal voltages are applied;

b. transistor means having an input and output terminal',

c. a plurality of resistance means connected respectively to said plurality of input terminals and to said input terminal of said transistor means to provide a predetermined output current responsive to said input voltages, each of said resistance means in series connection with said input terminals and having a predetermined number of resistors in parallel connection each to the other for producing said predetermined output current, said resistors in said resistance means having substantially equal resistance values; and

. a deflection coil connected to said output terminal of said transistor means and responsive with respect to said predetermined output current of said plurality of resistance means.

2. The cathode ray tube deflection system as recited in claim 1 including a plurality of transistor switch means each connected to a separate one of said input terminals at an input end of said transistor switch means and respective resistance means at an output end of said transistor switch means to provide current flow of a predetermined value to said resistance means in series connection with said transistor switch means when said signal voltages are applied to said input terminals.

3. The cathode ray tube deflection system as recited in claim 2 including a plurality of capicitor-resistance circuits connected to respective input terminals and transistor switch means to provide an increased value current flow upon application of said signal voltages to said input terminals.

4. The cathode ray tube deflection system as recited in claim 1 wherein said plurality of resistance means comprises a plurality of resistance circuits, each of said circuits having a different and distinct resistance value and connected to a respective input terminal.

5. The cathode ray tube deflection system as recited in claim 4 wherein said plurality of resistance circuits are connected to provide a sum of current, responsive to said signal voltages into said input terminal of said transistor means.

6. The cathode ray tube deflection system as recited in claim 5 wherein said plurality of resistance circuits includes:

a. a single valued series resistor circuit; and,

b. a plurality of resistor circuits, each of said circuits comprising a multiple of said single valued series resistor in parallel connection.

7. The cathode ray tube deflection system as recited in claim 6 wherein the number of said series resistors in parallel connection within each of said resistor circuits is defined by a different binary integer for each of said resistor circuits.

8. The cathode ray tube deflection system as recited in claim 7 wherein said transistor means is in series connection with said plurality of resistance'circuits and said deflection coil. 

1. A cathode ray tube deflection system automatically operable as a function of signal voltages applied, comprising: a. a plurality of input terminals through which said signal voltages are applied; b. transistor means having an input and output terminal; c. a plurality of resistance means connected respectively to said plurality of input terminals and to said input terminal of said transistor means to provide a predetermined output current responsive to said input voltages, each of said resistance means in series connection with said input terminals and having a predetermined number of resistors in parallel connection each to the other for producing said predetermined output current, said resistors in said resistance means having substantially equal resistance values; and, d. a deflection coil connected to said output terminal of said transistor means and responsive with respect to said predetermined output current of said plurality of resistance means.
 1. A cathode ray tube deflection system automatically operable as a function of signal voltages applied, comprising: a. a plurality of input terminals through which said signal voltages are applied; b. transistor means having an input and output terminal; c. a plurality of resistance means connected respectively to said plurality of input terminals and to said input terminal of said transistor means to provide a predetermined output current responsive to said input voltages, each of said resistance means in series connection with said input terminals and having a predetermined number of resistors in parallel connection each to the other for producing said predetermined output current, said resistors in said resistance means having substantially equal resistance values; and, d. a deflection coil connected to said output terminal of said transistor means and responsive with respect to said predetermined output current of said plurality of resistance means.
 2. The cathode ray tube deflection system as recited in claim 1 including a plurality of transistor switch means each connected to a separate one of said input terminals at an input end of said transistor switch means and respective resistance means at an output end of said transistor switch means to provide current flow of a predetermined value to said resistance means in series connection with said transistor switch means when said signal voltages are applied to said input terminals.
 3. The cathode ray tube deflection system as recited in claim 2 including a plurality of capicitor-resistance circuits connected to respective input terminals and transistor switch means to provide an increased value current flow upon application of said signal voltages to said input terminals.
 4. The cathode ray tube deflection system as recited in claim 1 wherein said plurality of resistance means comprises a plurality of resistance circuits, each of said circuits having a different and distinct resistance value and connected to a respective input terminal.
 5. The cathode ray tube deflection system as recited in claim 4 wherein said plurality of resistance circuits are connected to provide a sum of current, responsive to said signal voltages into said input terminal of said transistor means.
 6. The cathode ray tube deflection system as recited in claim 5 wherein said plurality of resistance circuits includes: a. a single valued series resistor circuit; and, b. a plurality of resistor circuits, each of said circuits comprising a multiple of said single valued series resistor in parallel connection.
 7. The cathode ray tube deflection system as recited in claim 6 wherein the number of said series resistors in parallel connection within each of said resistor circuits is defined by a different binary integer for each of said resistor circuits. 